Senior Power Design Engineer

Design Engineer III

This role involves performing comprehensive power analysis throughout various design stages, from RTL to GDSII. The engineer will contribute to the development, improvement, and automation of power analysis flows, including gathering and analyzing large datasets for power modeling through automated processes. Additionally, the role requires investigating and addressing power inefficiencies and providing actionable feedback to the RTL design team.

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About Cincinnatus

Equal Employment Opportunity

Design Engineer III This role involves performing comprehensive power analysis throughout various design stages, from RTL to GDSII. The engineer will contribute to the development, improvement, and automation of power analysis flows, including gathering and analyzing large datasets for power modeling through automated processes. Additionally, the role requires investigating and addressing power inefficiencies and providing actionable feedback to the RTL design team. Pursuant to the California Fair Chance Act, Los Angeles County Fair Chance Ordinance for Employers, Los Angeles Fair Chance Initiative for Hiring Ordinance, and San Francisco Fair Chance Ordinance, qualified applicants will be considered for assignment with arrest and conviction records. Criminal history may have a direct, adverse, and negative relationship with some of the material job duties of this position. These include the duties and responsibilities listed above, as well as the abilities to adhere to company policies, exercise sound judgment, effectively manage stress and work safely and respectfully with others, exhibit trustworthiness, meet client expectations, standards, and accompanying requirements, and safeguard business operations and company reputation. Applicants must be located in the United States. Cincinnatus does not sponsor visas and will not provide visa sponsorship for this role. Cincinnatus is an enterprise staffing company that partners with leading technology companies to source and employ highly skilled professionals for full-time and long-term contingent roles. Cincinnatus serves as the employer of record for these engagements, providing W-2 employment, payroll, benefits, and compliance, while placing employees directly within client teams to work on high-impact initiatives. Roles hired through Cincinnatus are not project-based or freelance engagements. They are structured, role-based positions that typically involve full-time or fixed-term commitments, close collaboration with a client's internal teams, and integration into standard enterprise workflows. Cincinnatus is a legal entity separate from Mercor. While opportunities may be discovered through Mercor's platform, employment, onboarding, payroll, and benefits for these roles are administered by Cincinnatus. Cincinnatus is proud to be an Equal Employment Opportunity employer. We do not discriminate based upon race, religion, color, national origin, sex (including pregnancy, childbirth, reproductive health decisions, or related medical conditions), sexual orientation, gender identity, gender expression, age, status as a protected veteran, status as an individual with a disability, genetic information, political views or activity, or any other legally protected characteristic. Cincinnatus is committed to providing reasonable accommodations for qualified individuals with disabilities and disabled veterans throughout the job application process. We consider all qualified applicants without regard to legally protected characteristics and provide reasonable accommodations upon request.

• Perform comprehensive power analysis at various design stages, spanning from RTL to GDSII.
• Contribute to the development, improvement, and automation of various power analysis flows, including gathering and analyzing large datasets for power modeling via automated processes.
• Investigate and address power inefficiencies, providing actionable feedback to the RTL design team.
• Demonstrated experience with RTL-to-GDSII design flow usage and development in advanced technology nodes (7nm and below).
• Expertise in low-power implementation and signoff, including power gating, multiple voltage rails, and Unified Power Format (UPF) usage.
• Proven experience in power analysis and reduction utilizing industry-standard tools such as PrimeTime PX/PrimePower.
• Proficiency in scripting languages, with a strong emphasis on Python and ML/AI frameworks.
• Working knowledge of RTL design principles.
• Experience in RTL power optimization using specialized tools like Power-Artist.
• Ability to learn quickly, explore new ideas, and iterate rapidly to achieve optimal results.
• Experience with synthesis and Place and Route (PnR) flows (preferred).
• Experience analyzing Intellectual Property (IP) design for power characteristics and building run-time estimation models for use by software/firmware teams (preferred).
• Skills in data analysis and data modeling, including the application of machine learning approaches (preferred).
• Bachelor’s degree in Electrical/Computer Engineering or Computer Science required.
• Master’s degree preferred but not required.